__DefGroup MMA : [ALL]
  __Encoding
    field<12,  3> Pred pg = PT;
    field<15,  1> PModi pg.not = False;
    field<16,  8> Reg rd;
    field<24,  8> Reg ra; //src0
    field<32,  8> Reg rb; //src1
    field<64,  8> Reg rc; //src2

__DefBitFieldType HMMA_MNK<2>
    1684;  // tf32
    1688;  // tf32, f16, bf16
    16816; //       f16, bf16

__DefBitFieldType HMMA_SP_MNK<2>
    1688;  // tf32
    16816; // tf32, f16, bf16
    16832; //       f16, bf16

__DefBitFieldType HMMA_ABType<2>
    TF32;  //
    BF16;
    F16;

__DefBitFieldType HMMA_CDType<2>
    F16;
    F32;

__DefBitFieldType Buf<1>
    nobuf;
    buf;

//IMMA
__DefBitFieldType IMMA_MNK<3>
    8816;  // i8
    8832;  //     i4
    16816; // i8
    16832; // i8, i4
    16864; //     i4

__DefBitFieldType IMMA_SP_MNK<2>
    16832;  // i8,
    16864;  // i8, i4
    168128; //     i4

__DefBitFieldType IMMA_ABType<2>
    U4;
    S4;
    U8;
    S8;

//BMMA
__DefBitFieldType BMMA_MNK<2>
    88128;   //
    168128;
    168256;

//QMMA
__DefBitFieldType QMMA_MNK<2>
    16816;
    16832;

__DefBitFieldType QMMA_SP_MNK<2>
    16832;
    16864;

__DefBitFieldType QMMA_ABType<2>
    E4M3;
    E5M2;

__DefBitFieldType QMMA_CDType<2>
    F16;
    F32;

//OMMA
__DefBitFieldType OMMA_MNK<2>
    16864;

__DefBitFieldType OMMA_ABType<2>
    E2M1;
    E0M3;

__DefBitFieldType OMMA_CDType<2>
    F16;
    F32;

__DefBitFieldType IMMA_SAT<1>
    NoSAT;
    SAT;

__DefOptype HMMA : [MMA]
  __Encoding
    field<0,  8> Optype optype ==  HMMA;
    field<72,  2> HMMA_ABType abtype; // BF16/TF32/FP16
    field<76,  2> HMMA_CDType cdtype; // fp16/fp32

    field<80,  2> HMMA_MNK mnk;

    field<84,  1> Buf ra.buf = nobuf;
    field<85,  1> Buf rb.buf = nobuf;

  __OperandInfo
    ModiOrder<cdtype, abtype>;

  __Exception
    EncodingError<IllegalBitFieldCombination, "TF32/BF16 can only accumulate to F32."> = ((abtype=="TF32") or (abtype=="BF16")) and (cdtype=="F16");  // TODO: TF32/BF16 can only accumulate to F32
    EncodingError<IllegalBitFieldCombination, "HMMA.TF32 doesnot support mnk=16816."> = (abtype=="TF32") and (mnk=="16816");
    EncodingError<IllegalBitFieldCombination, "HMMA.F16/BF16 doesnot support mnk=1684."> = (abtype!="TF32") and (mnk=="1684");

__DefOpcode HMMA_RRR : [HMMA]
  __Encoding
    field<8,  4> SType stype ==  RRR;

  __OperandInfo
    InList<pg, ra, rb, rc>;
    OutList<rd>;
    Order<pg, rd, ra, rb, rc>;
    Bitwidth<ra> = 16*( (mnk=="1684")*4 + (mnk=="1688")*8 + (mnk=="16816")*16) * ((abtype=="TF32")*16+16) / 32; // m*k*a_elembits/32
    Bitwidth<rb> =  8*( (mnk=="1684")*4 + (mnk=="1688")*8 + (mnk=="16816")*16) * ((abtype=="TF32")*16+16) / 32; // n*k*b_elembits/32
    Bitwidth<rc> = 16 * 8 * ((cdtype=="F32")*16+16) / 32;                                                   // m*n*c_elembits/32
    Bitwidth<rd> = 16 * 8 * ((cdtype=="F32")*16+16) / 32;

__DefOptype HMMA_SP : [MMA]
  __Encoding
    field< 0,  8> Optype optype ==  HMMA_SP;
    field<40,  8> Reg re; //metadata

    field<72,  2> HMMA_ABType abtype; // BF16/TF32/F16
    field<76,  2> HMMA_CDType cdtype; // F16/F32
    field<80,  2> HMMA_SP_MNK mnk;

    field<84,  1> Buf ra.buf = nobuf;
    field<85,  1> Buf rb.buf = nobuf;
    field<86,  1> Buf re.buf = nobuf;

    field<88,  2> UImm2 mdsel; // imm

  __OperandInfo
    ModiOrder<cdtype, abtype>;

  __Exception
    EncodingError<IllegalBitFieldCombination, "TF32/BF16 can only accumulate to F32."> = ((abtype=="TF32") or (abtype=="BF16")) and (cdtype=="F16");  // TODO:
    EncodingError<IllegalBitFieldCombination, "HMMA_SP.TF32 doesnot support mnk=16832."> = (abtype=="TF32") and (mnk=="16832");
    EncodingError<IllegalBitFieldCombination, "HMMA_SP.F16/BF16 doesnot support mnk=1688."> = (abtype!="TF32") and (mnk=="1688");

__DefOpcode HMMA_SP_RRR : [HMMA_SP]
  __Encoding
    field<8,  4> SType stype ==  RRR;
  __OperandInfo
    InList<pg, ra, rb, rc, re>;
    OutList<rd>;
    Order<pg, rd, ra, rb, rc, re, mdsel>;
    Bitwidth<ra> = 16*( (mnk=="1688")*8 + (mnk=="16816")*16 + (mnk=="16832")*32) * ((abtype=="TF32")*16+16) / 64 ; // m*k*a_elembits/64, extra /2 for sp
    Bitwidth<rb> =  8*( (mnk=="1688")*8 + (mnk=="16816")*16 + (mnk=="16832")*32) * ((abtype=="TF32")*16+16) / 32 ; // n*k*b_elembits/32
    Bitwidth<rc> = 16 * 8 * ((cdtype=="F32")*16+16) / 32;                                                      // m*n*c_elembits/32
    Bitwidth<rd> = 16 * 8 * ((cdtype=="F32")*16+16) / 32;
    Bitwidth<re> = 32;

__DefOptype IMMA : [MMA]
  __Encoding
    field<0,  8> Optype optype ==  IMMA;
    field<72,  2> IMMA_ABType atype; // U/S4 U/S8
    field<74,  2> IMMA_ABType btype; // U/S4 U/S8
    field<80,  3> IMMA_MNK mnk;
    field<84,  1> Buf ra.buf = nobuf;
    field<85,  1> Buf rb.buf = nobuf;
    field<90,  1> IMMA_SAT sat = NoSAT;

  __OperandInfo
    ModiOrder<atype, btype>;

  __Exception
    EncodingError<IllegalBitFieldCombination, "atype/btype should be with same bitwidth."> = not( (((atype=="U4") or (atype=="S4")) and ((btype=="U4") or (btype=="S4"))) or (((atype=="U8") or (atype=="S8")) and ((btype=="U8") or (btype=="S8"))) );  // TODO:
    EncodingError<IllegalBitFieldCombination, "IMMA.S4/U4 only supports mnk=8832/16832/16864."> = (atype=="S4" or atype=="U4") and (mnk!="8832" and mnk!="16832" and mnk!="16864"); // S4/U4 8832/16832/16864
    EncodingError<IllegalBitFieldCombination, "IMMA.S8/U8 only supports mnk=8816/16816/16832."> = (atype=="S8" or atype=="U8") and (mnk!="8816" and mnk!="16816" and mnk!="16832"); // S8/U8 8816/16816/16832

__DefOpcode IMMA_RRR : [IMMA]
  __Encoding
    field<8,  4> SType stype ==  RRR;
  __OperandInfo
    InList<pg, ra, rb, rc>;
    OutList<rd>;
    Order<pg, rd, ra, rb, rc>;
    Bitwidth<ra> = ((mnk=="8816")*8 + (mnk=="8832")*8 + (mnk=="16816")*16 + (mnk=="16832")*16 + (mnk=="16864")*16) * ((mnk=="8816")*16 + (mnk=="8832")*32 + (mnk=="16816")*16 + (mnk=="16832")*32 + (mnk=="16864")*64) * ((atype=="S8")*4+(atype=="U8")*4+4) / 32; // m*k*a_elembits/32
    Bitwidth<rb> =  8*( (mnk=="8816")*16 + (mnk=="8832")*32 + (mnk=="16816")*16 + (mnk=="16832")*32 + (mnk=="16864")*64) * ((atype=="S8")*4+(atype=="U8")*4 + 4) / 32; // n*k*b_elembits/32
    Bitwidth<rc> = ((mnk=="8816")*8 + (mnk=="8832")*8 + (mnk=="16816")*16 + (mnk=="16832")*16 + (mnk=="16864")*16) * 8 * 32 / 32;   // m*n*c_elembits/32
    Bitwidth<rd> = ((mnk=="8816")*8 + (mnk=="8832")*8 + (mnk=="16816")*16 + (mnk=="16832")*16 + (mnk=="16864")*16) * 8 * 32 / 32;

__DefOptype IMMA_SP : [MMA]
  __Encoding
    field<0,  8> Optype optype ==  IMMA_SP;
    field<40,  8> Reg re;            // metadata
    field<72,  2> IMMA_ABType atype; // U/S4 U/S8
    field<74,  2> IMMA_ABType btype; // U/S4 U/S8
    field<80,  2> IMMA_SP_MNK mnk;
    field<84,  1> Buf ra.buf = nobuf;
    field<85,  1> Buf rb.buf = nobuf;
    field<86,  1> Buf re.buf = nobuf;
    field<88,  2> UImm2 mdsel; // imm

  __OperandInfo
    ModiOrder<atype, btype>;
  __Exception
    EncodingError<IllegalBitFieldCombination, "atype/btype should be with same bitwidth."> = not( (((atype=="U4") or (atype=="S4")) and ((btype=="U4") or (btype=="S4"))) or (((atype=="U8") or (atype=="S8")) and ((btype=="U8") or (btype=="S8"))) );  // TODO:
    EncodingError<IllegalBitFieldCombination, "IMMA_SP.S4/U4 only supports mnk=16864/168128."> = (atype=="S4" or atype=="U4") and (mnk=="16832");  // S4/U4
    EncodingError<IllegalBitFieldCombination, "IMMA_SP.S8/U8 only supports mnk=16832/16864."> = (atype=="S8" or atype=="U8") and (mnk=="168128");  // S8/U8

__DefOpcode IMMA_SP_RRR : [IMMA_SP]
  __Encoding
    field<8,  4> SType stype ==  RRR;
  __OperandInfo
    InList<pg, ra, rb, rc, re>;
    OutList<rd>;
    Order<pg, rd, ra, rb, rc, re, mdsel>;
    Bitwidth<ra> = 16*( (mnk=="16832")*32 + (mnk=="16864")*64 + (mnk=="168128")*128) * ((atype=="S8")*4+(atype=="U8")*4+4) / 64; // m*k*a_elembits/32
    Bitwidth<rb> =  8*( (mnk=="16832")*32 + (mnk=="16864")*64 + (mnk=="168128")*128) * ((atype=="S8")*4+(atype=="U8")*4+4) / 32; // n*k*b_elembits/32
    Bitwidth<rc> = 128;    // m*n*c_elembits/32 = 16 * 8 * 32 / 32 = 128
    Bitwidth<rd> = 128;
    Bitwidth<re> = 32;
//BMMA

__DefOptype BMMA : [MMA]
  __Encoding
    field<0,  8> Optype optype ==  BMMA;
    field<80, 2> BMMA_MNK mnk;

    field<84, 1> Buf ra.buf = nobuf;
    field<85, 1> Buf rb.buf = nobuf;

    // Default to AND.POPC

__DefOpcode BMMA_RRR : [BMMA]
  __Encoding
    field<8,  4> SType stype ==  RRR;
  __OperandInfo
    InList<pg, ra, rb, rc>;
    OutList<rd>;
    Order<pg, rd, ra, rb, rc>;
    Bitwidth<ra> = ((mnk=="88128")*8 + (mnk=="168128")*16 + (mnk=="168256")*16) * ( (mnk=="88128")*128 + (mnk=="168128")*128 + (mnk=="168256")*256) / 32; // m*k*a_elembits/32
    Bitwidth<rb> = 8*( (mnk=="88128")*128 + (mnk=="168128")*128 + (mnk=="168256")*256) / 32;  // n*k*b_elembits/32
    Bitwidth<rc> = ((mnk=="88128")*8 + (mnk=="168128")*16 + (mnk=="168256")*16) * 8;          // m*n*c_elembits/32
    Bitwidth<rd> = ((mnk=="88128")*8 + (mnk=="168128")*16 + (mnk=="168256")*16) * 8;

// QMMA
__DefOptype QMMA : [MMA]
  __Encoding
    field<0,   8> Optype optype ==  QMMA;
    field<72,  2> QMMA_ABType atype; // FP8_E4M3 FP8_E5M2
    field<74,  2> QMMA_ABType btype; // FP8_E4M3 FP8_E5M2
    field<76,  2> QMMA_CDType cdtype; // fp16/fp32
    field<80,  2> QMMA_MNK mnk;

    field<84,  1> Buf ra.buf = nobuf;
    field<85,  1> Buf rb.buf = nobuf;
  __OperandInfo
    ModiOrder<atype, btype>;

__DefOpcode QMMA_RRR : [QMMA]
  __Encoding
    field<8,  4> SType stype ==  RRR;
  __OperandInfo
    InList<pg, ra, rb, rc>;
    OutList<rd>;
    Order<pg, rd, ra, rb, rc>;
    Bitwidth<ra> =  16 * ( (mnk=="16832")*32 + (mnk=="16816")*16 ) * 8 / 32; // m*k*a_elembits/32
    Bitwidth<rb> =   8 * ( (mnk=="16832")*32 + (mnk=="16816")*16 ) * 8 / 32; // n*k*b_elembits/32
    Bitwidth<rc> = 16*8*((cdtype=="F32")*16+16) / 32;          // m*n*c_elembits/32
    Bitwidth<rd> = 16*8*((cdtype=="F32")*16+16) / 32;

__DefOptype QMMA_SP : [MMA]
  __Encoding
    field<0,  8> Optype optype ==  QMMA_SP;

    field<40,  8> Reg re;//metadata

    field<72,  2> QMMA_ABType atype; // FP8_E4M3 FP8_E5M2
    field<74,  2> QMMA_ABType btype; // FP8_E4M3 FP8_E5M2
    field<76,  2> QMMA_CDType cdtype; // fp16/fp32
    field<80,  2> QMMA_SP_MNK mnk;

    field<84,  1> Buf ra.buf = nobuf;
    field<85,  1> Buf rb.buf = nobuf;
    field<86,  1> Buf re.buf = nobuf;

    field<88,  2> UImm2 mdsel; // imm

  __OperandInfo
    ModiOrder<atype, btype>;

__DefOpcode QMMA_SP_RRR : [QMMA_SP]
  __Encoding
    field<8,  4> SType stype ==  RRR;
  __OperandInfo
    InList<pg, ra, rb, rc, re>;
    OutList<rd>;
    Order<pg, rd, ra, rb, rc, re, mdsel>;
    Bitwidth<ra> =  16 * ( (mnk=="16864")*64 + (mnk=="16832")*32 ) * 8 / 64; // m*k*a_elembits/64
    Bitwidth<rb> =   8 * ( (mnk=="16864")*64 + (mnk=="16832")*32 ) * 8 / 32; // n*k*b_elembits/32
    Bitwidth<rc> = 16*8*((cdtype=="F32")*16 + 16) / 32;          // m*n*c_elembits/32
    Bitwidth<rd> = 16*8*((cdtype=="F32")*16 + 16) / 32;
    Bitwidth<re> = 32;

__DefOptype OMMA : [MMA]
  __Encoding
    field<0,   8> Optype optype==OMMA;
    field<72,  2> OMMA_ABType atype;  // FP4
    field<74,  2> OMMA_ABType btype;  // FP4
    field<76,  2> OMMA_CDType cdtype; // fp16/fp32
    field<80,  2> OMMA_MNK mnk;
  __OperandInfo
    ModiOrder<atype, btype>;

  __Semantics
    TODO

__DefOpcode OMMA_RRR : [OMMA]
  __Encoding
    field<8,  4> SType stype==RRR;
  __OperandInfo
    InList<pg, ra, rb, rc>;
    OutList<rd>;
    Order<pg, rd, ra, rb, rc>;
    Bitwidth<ra> =  16 * ( (mnk=="16864")*64 ) * 4 / 32; // m*k*a_elembits/32
    Bitwidth<rb> =   8 * ( (mnk=="16864")*64 ) * 4 / 32; // n*k*b_elembits/32
    Bitwidth<rc> = 16*8*((cdtype=="F32")*16+16) / 32;          // m*n*c_elembits/32
    Bitwidth<rd> = 16*8*((cdtype=="F32")*16+16) / 32;
